The following notes refer to material from Chapter 2.

Machine Architecture:

Central Processing Unit (CPU):

Electronic circuitry where overall operation of the computer is controlled. A CPU contains the following:

• Arithmetic/Logic Unit (ALU): Circuitry for arithmetic and logic computations.
• Control Unit: Circuitry that co-ordinates CPU actions. Determines the instructions to be excuted by the CPU.
• Clock: Synchronizes CPU actions.
• Registers: Very fast CPU specific memory. Typically two types, general purpose and special purpose.
• Cache: Additional CPU memory to facilitate throughput.

e.g.: Intel Pentium; Motorola/IBM/Apple PowerPC; Sun Microsystems SPARC

CPU/Memory interface:

The CPU is connected to main memory (RAM) by one or more sets of parallel channels (wires) known as a bus. This is the mechnism by which data is transferred between main memory and the CPU.

Machine Instructions:

The Control Unit of a CPU is designed to recognize a limited set of instructions. These instructions may typically be grouped into the following categories:

• Data access
• Arithmetic and Logic Operations
• Control Flow

Instructions may be decomposed into two components:

• Op-Code : specifies the action
• Operands: qualifies the action

Instructions may be coded as bit patterns. This idea leads to the notion of a stored program (usually attributed to John von Neumann). The stored program concept essentially says that since instructions may be coded as bit patterns then instructions may be stored in memory as data. The control unit must then be designed to locate and execute these instructions.

Note: A program is a set of instructions that accomplishes a particular task. The act of assembling instructions together in the required order to solve a problem is known as programming.

Hypothetical Machine:

See Appendix C of text.

• 256 bytes of RAM
• 16 general purpose registers
• 2 special purpose registers
  • PC - Program Counter
  • IR - Instruction Register
• Two byte instructions (coded in hex):
  • Op-Code: 4 bits
  • Operand: next 12 bits

  e.g. 156c, 166d, 5056 (see Appendix C for all 12 instructions)

Fetch/Decode/Execute (FDE) Cycle:

The CPU processes instructions by way of the FDE cycle. This cycle may be described thus:

1. Fetch
   • Load IR with instruction from address in PC
   • Increment PC (i.e. increase by 2 bytes)
2. Decode
   • Determine instruction from op-code
   • Determine operands
3. Execute
   • Perform action for op-code and operands

Assuming that the PC is initially set to a4 then the instructions for this program would be processed as indicated in this FDE trace.

Logic:

Let P represent some statement and Q some other statement. The rules of Boolean logic allow us to determine the truth of statements such as P AND Q, P OR Q, P XOR Q given the truth of the individual statements P, Q. In the binary world of computers the convention is to represent F by the binary digit 0 and T by the binary digit 1. The rules of logic may then be summarized thus:

     P  Q  P AND Q
     -------------
     1  1     1
     1  0     0
     0  1     0
     0  0     0


     P  Q  P OR Q
     -------------
     1  1     1
     1  0     1
     0  1     1
     0  0     0


     P  Q  P XOR Q
     -------------
     1  1     0
     1  0     1
     0  1     1
     0  0     0

The ALU has instructions to accomplish Boolean logic but these instructions apply these rules to groups of bits. That is, we may think of these instructions as generalizations of single bit AND, OR, and XOR. For example:

     11010100
AND  00010000
     -------- 
     00010000            

 
     11010100
 OR  00010000
     --------
     11010100            
 
 
     11010100
XOR  11111111
     --------
     00101011    

Notice the interesting effect of applying the XOR instruction when one of the operands is 1111111. The effect is equivalent to "flipping" or complementing the bits of the other operand!