Finite state machine

From Wikipedia, the free encyclopedia.

A finite state machine (FSM) or finite state automaton (FSA) is an abstract machine used in the study of computation and languages that has only a finite, constant amount of memory (the state). It can be conceptualised as a directed graph. There are a finite number of states, and each state has transitions to zero or more states. There is an input string that determines which transition is followed. Finite state machines are studied in automata theory, a subfield of theoretical computer science.

There are several types of finite state machines:

Acceptors produce a "yes or no" answer to the input; either accepting the input or not. Recognizers categorise the input. Transducers are used to generate an output from a given input.

Finite automata may operate on languages of finite words (the standard case), infinite words (Rabin automata, Büchi automata, or various types of trees (tree automata), to name the most important cases.

A further distinction is between deterministic and non-deterministic automata. In deterministic automata, for each state there is at most one transition for each possible input. In non-deterministic automata, there can be more than one transition from a given state for a given possible input. Non-deterministic automata are usually implemented by converting them to deterministic automata - in the worst case, the generated deterministic automaton is exponentially bigger than the non-deterministic automaton (although it can usually be substantially optimised).

The standard acceptance condition for nondeterministic automata requires that some computation accepts the input. Alternating automata also provide a dual notion, where for acceptance all nondeterministic computations must accept.

Apart from theory, finite state machines occur also in hardware circuits, where the input, the state and the output are bit vectors of fixed size (Moore and Mealy machines).

Formal definitions

Deterministic finite automaton

Formally, a deterministic finite automaton (DFA) consists of

The machine starts in the start state and reads in a string of symbols from its alphabet. It uses the transition function T to determine the next state using the current state and the symbol just read. If, when it has finished reading, it is in an accepting state, it is said to accept the string, otherwise it is said to reject the string. The set of strings it accepts form a language, which is the language the DFA recognises.

Non-deterministic finite automaton

A non-deterministic finite automaton (NFA) consists of

The machine starts in all of the start states and reads in a string of symbols from its alphabet. It uses the transition relation T to determine the next state(s) using the current state(s) and the symbol just read. If, when it has finished readin, it is in an accepting state, it is said to accept the string, otherwise it is said to reject the string. The set of strings it accepts form a language, which is the language the NFA recognises.

Optimisation and Canonicalisation

The problem of optimizing an FSM (finding the machine with the least number of states that performs the same function) is decidable, unlike the same problem for more computationally powerful machines. Furthermore, it is possible to construct a canonical version of any FSM, in order to test for equality. Both of these problems can be solved using a Colouring algorithm.

Computational power

FSMs can only recognize regular languages, and hence they are less computationally powerful than Turing machines - there are decideable problems that are not computable using a FSM.

For each non-deterministic FSM a deterministic FSM of equeal computational power can be constructed with an algorithm.

Representation

A FSM may be represented using a state transition table or a state diagram.

Implementation

A finite state machine can be implemented in software with a state transition matrix (in some cases a sparse matrix implemented with linkedd lists or a huge switch-statement for detecting the internal state and then individual switch statements for decoding the input symbol.

In hardware a fsm may be directly implemented using a Programmable logic device.

References

Retrieved from Wikipedia, the free encyclopedia.